Friday, 4 October 2013

VLSI related projects


VLSI IEEE PROJECT TITLES LIST
COMMUNICATION VLSI:
VLSICM01
PIPELINED RADIX-2K FEEDFORWARD FFT ARCHITECTURES

2013
VLSICM18
AN EFFICIENT VLSI ARCHITECTURE OF VITERBI DECODER FOR DSP APPLICATIONS
2012
IMAGE PROCESSING VLSI:
VLSIIP02
EFFICIENCY OF BCH CODES IN DIGITAL IMAGE WATERMARKING
2012

WIREless vlsi:                          
VLSIWV03
DESIGN AND IMPLEMENTATION OF ZIGBEE TRANSMITTER USING               ( C)
VERILOG
2013
LOW POWER VLSI:
VLSIL01
AREA EFFICIENT HIGH SPEED LOW POWER MULTIPLIER ARCHITECTURE FOR MULTIRATE FILTER DESIGN
2013
VLSIL02
LOW-POWER AND AREA-EFFICIENT CARRY SELECT ADDER

2012
CMOS VLSI:
VLSICV05
ULTRA LOW POWER BOOTH MULTIPLIER USING ASYNCHRONOUS LOGIC     (S)

2012
VLSICV06
A LOW-POWER LEVEL SHIFTER WITH LOGIC ERROR CORRECTION FOR         (J) EXTREMELY LOW-VOLTAGE DIGITAL CMOS LSIs
2012
CORE VLSI:
VLSICR01
ACHIEVING REDUCED AREA BY MULTI-BIT FLIP FLOP DESIGN

2013
VLSICR02
AN EFFICIENT HIGH SPEED WALLACE TREE MULTIPLIER

2013
VLSICR03
DESIGN AND ANALYSIS OF HIGH SPEED SHIFT REGISTER USING SINGLE CLOCK PULSE METHOD
2013
VLSICR04
 DESIGN AND IMPLEMENTATION OF 32 BIT UNSIGNED MULTIPLIER USING CLAA AND CSLA
2013
VLSICR09
LOW-POWER LOGARITHMIC NUMBER SYSTEM ADDITION/SUBTRACTION AND THEIR IMPACT ON DIGITAL FILTERS
2012
VLSICR12
DESIGN AND IMPLEMENTATION OF A HIGH PERFORMANCE MULTIPLIER USING HDL
2012
VLSICR13
DESIGN  &  IMPLEMENTATION  OF  FLOATING POINT ALU  ON  A  FPGA  PROCESSOR
2012

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